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zynq: remove i2c driver component and session

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This commit is contained in:
Johannes Schlatow
2017-03-02 18:44:08 +01:00
committed by Norman Feske
parent b58255eede
commit 458c013634
8 changed files with 0 additions and 721 deletions
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25
include/i2c_session/capability.h
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/*
* \brief I2C bus driver session capability type
* \author Mark Albers
* \date 2015-04-13
* \author Alexander Tarasikov <alexander.tarasikov@gmail.com>
* \date 2012-09-18
*/
/*
* Copyright (C) 2012 Ksys Labs LLC
* Copyright (C) 2012-2015 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _INCLUDE__I2C_SESSION__CAPABILITY_H_
#define _INCLUDE__I2C_SESSION__CAPABILITY_H_
#include <base/capability.h>
#include <i2c_session/zynq/i2c_session.h>
namespace I2C { typedef Genode::Capability<Session> Session_capability; }
#endif /* _INCLUDE__I2C_SESSION__CAPABILITY_H_ */

43
include/i2c_session/client.h
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@@ -1,43 +0,0 @@
/*
* \brief Client-side i2c interface
* \author Mark Albers
* \date 2015-04-13
* \author Alexander Tarasikov <alexander.tarasikov@gmail.com>
* \date 2012-09-18
*/
/*
* Copyright (C) 2012 Ksys Labs LLC
* Copyright (C) 2012-2015 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _INCLUDE__I2C_SESSION__CLIENT_H_
#define _INCLUDE__I2C_SESSION__CLIENT_H_
#include <i2c_session/zynq/capability.h>
#include <base/rpc_client.h>
namespace I2C {
struct Session_client : Genode::Rpc_client<Session>
{
explicit Session_client(Session_capability session)
: Genode::Rpc_client<Session>(session) { }
bool read_byte_16bit_reg(Genode::uint8_t adr, Genode::uint16_t reg, Genode::uint8_t *data)
{
return call<Rpc_read_byte_16bit_reg>(adr, reg, data);
}
bool write_16bit_reg(Genode::uint8_t adr, Genode::uint16_t reg,
Genode::uint8_t data)
{
return call<Rpc_write_16bit_reg>(adr, reg, data);
}
};
}
#endif /* _INCLUDE__I2C_SESSION__CLIENT_H_ */

35
include/i2c_session/connection.h
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/*
* \brief Connection to i2c service
* \author Mark Albers
* \author Alexander Tarasikov <alexander.tarasikov@gmail.com>
* \date 2012-09-18
*/
/*
* Copyright (C) 2012 Ksys Labs LLC
* Copyright (C) 2012 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _INCLUDE__I2C_SESSION__CONNECTION_H_
#define _INCLUDE__I2C_SESSION__CONNECTION_H_
#include <i2c_session/zynq/client.h>
#include <base/connection.h>
namespace I2C {
class Connection : public Genode::Connection<Session>,
public Session_client
{
public:
Connection(unsigned int bus_num) __attribute__((deprecated))
:
Genode::Connection<Session>(session("ram_quota=4K, bus=%zd", bus_num)),
Session_client(cap()) { }
};
}
#endif /* _INCLUDE__I2C_SESSION__CONNECTION_H_ */

69
include/i2c_session/i2c_session.h
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/*
* \brief I2C session interface
* \author Mark Albers
* \date 2015-04-13
* \author Alexander Tarasikov <alexander.tarasikov@gmail.com>
* \date 2012-09-18
*/
/*
* Copyright (C) 2012 Ksys Labs LLC
* Copyright (C) 2012-2015 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _INCLUDE__I2C_SESSION__I2C_SESSION_H_
#define _INCLUDE__I2C_SESSION__I2C_SESSION_H_
#include <base/signal.h>
#include <session/session.h>
namespace I2C {
struct Session : Genode::Session
{
static const char *service_name() { return "I2C"; }
virtual ~Session() { }
/**
* Read a single byte from a 16 bit register of the device
*
* \param adr the address of the device on the bus
* \param reg the register to read
* \param data the read value
*
*/
virtual bool read_byte_16bit_reg(Genode::uint8_t adr, Genode::uint16_t reg, Genode::uint8_t *data) = 0;
/**
* Write a single data byte to a 16 bit register
*
* \param adr the address of the device on the bus
* \param reg the register to write
* \param data the value to write
*
*/
virtual bool write_16bit_reg(Genode::uint8_t adr, Genode::uint16_t reg,
Genode::uint8_t data) = 0;
/*********************
** RPC declaration **
*********************/
GENODE_RPC(Rpc_read_byte_16bit_reg, bool, read_byte_16bit_reg,
Genode::uint8_t, Genode::uint16_t, Genode::uint8_t*);
GENODE_RPC(Rpc_write_16bit_reg, bool, write_16bit_reg,
Genode::uint8_t, Genode::uint16_t, Genode::uint8_t);
GENODE_RPC_INTERFACE(
Rpc_read_byte_16bit_reg,
Rpc_write_16bit_reg
);
};
}
#endif /* _INCLUDE__I2C_SESSION__I2C_SESSION_H_ */

100
src/drivers/i2c/spec/zynq/driver.h
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/*
* \brief I2C Driver for Zynq
* \author Mark Albers
* \date 2015-03-12
*/
/*
* Copyright (C) 2015 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _DRIVER_H_
#define _DRIVER_H_
#include <io_mem_session/connection.h>
#include <timer_session/connection.h>
#include <util/mmio.h>
#include <drivers/board_base.h>
#include "i2c.h"
namespace I2C {
using namespace Genode;
class Driver;
}
class I2C::Driver
{
private:
class I2C_bank
{
private:
Zynq_I2C _i2c;
public:
I2C_bank(Genode::addr_t base, Genode::size_t size) : _i2c(base, size) { }
Zynq_I2C* regs() { return &_i2c; }
};
static I2C_bank _i2c_bank[2];
Driver() {}
~Driver() {}
public:
static Driver& factory();
bool read_byte_16bit_reg(unsigned bus, Genode::uint8_t adr, Genode::uint16_t reg, Genode::uint8_t *data)
{
Zynq_I2C *i2c_reg = _i2c_bank[bus].regs();
Genode::uint8_t buf[2];
buf[0]=reg >> 8;
buf[1]=reg;
if (i2c_reg->i2c_write(adr, buf, 2) != 0)
{
Genode::error("Zynq i2c: read failed");
return false;
}
if (i2c_reg->i2c_read_byte(adr, data) != 0)
{
Genode::error("Zynq i2c: read failed");
return false;
}
return true;
}
bool write_16bit_reg(unsigned bus, Genode::uint8_t adr, Genode::uint16_t reg,
Genode::uint8_t data)
{
Zynq_I2C *i2c_reg = _i2c_bank[bus].regs();
Genode::uint8_t buf[3];
buf[0]=reg >> 8;
buf[1]=reg;
buf[2]=data;
if (i2c_reg->i2c_write(adr, buf, 3) != 0)
{
Genode::error("Zynq i2c: write failed");
return false;
}
return true;
}
};
I2C::Driver::I2C_bank I2C::Driver::_i2c_bank[2] = {
{Genode::Board_base::I2C0_MMIO_BASE, Genode::Board_base::I2C_MMIO_SIZE},
{Genode::Board_base::I2C1_MMIO_BASE, Genode::Board_base::I2C_MMIO_SIZE},
};
I2C::Driver& I2C::Driver::factory()
{
static I2C::Driver driver;
return driver;
}
#endif /* _DRIVER_H_ */

333
src/drivers/i2c/spec/zynq/i2c.h
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@@ -1,333 +0,0 @@
/*
* \brief I2C Driver for Zynq
* \author Mark Albers
* \date 2015-03-12
*/
/*
* Copyright (C) 2015 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#ifndef _I2C_H_
#define _I2C_H_
#include <os/attached_io_mem_dataspace.h>
#include <util/mmio.h>
/* Transfer direction */
#define SENDING 0
#define RECEIVING 1
/* Interrupt masks */
#define INTERRUPT_ARB_LOST_MASK 0x00000200
#define INTERRUPT_RX_UNF_MASK 0x00000080
#define INTERRUPT_TX_OVR_MASK 0x00000040
#define INTERRUPT_RX_OVR_MASK 0x00000020
#define INTERRUPT_SLV_RDY_MASK 0x00000010
#define INTERRUPT_TO_MASK 0x00000008
#define INTERRUPT_NACK_MASK 0x00000004
#define INTERRUPT_DATA_MASK 0x00000002
#define INTERRUPT_COMP_MASK 0x00000001
#define ALL_INTERRUPTS_MASK 0x000002FF
/* Maximal transfer size */
#define I2C_MAX_TRANSFER_SIZE 252
/* FIFO size */
#define I2C_FIFO_DEPTH 16
/* Number of bytes at data intr */
#define I2C_DATA_INTR_DEPTH 14
namespace I2C {
using namespace Genode;
class Zynq_I2C;
}
struct I2C::Zynq_I2C : Attached_io_mem_dataspace, Mmio
{
Zynq_I2C(Genode::addr_t const mmio_base, Genode::size_t const mmio_size) :
Genode::Attached_io_mem_dataspace(mmio_base, mmio_size),
Genode::Mmio((Genode::addr_t)local_addr<void>())
{
}
~Zynq_I2C()
{
}
/*
* Registers
*/
struct Control : Register<0x0, 16>
{
struct divisor_a : Bitfield<14,2> {};
struct divisor_b : Bitfield<8,6> {};
struct CLR_FIFO : Bitfield<6,1> {};
struct SLVMON : Bitfield<5,1> {};
struct HOLD : Bitfield<4,1> {};
struct ACK_EN : Bitfield<3,1> {};
struct NEA : Bitfield<2,1> {};
struct MS : Bitfield<1,1> {};
struct RW : Bitfield<0,1> {};
};
struct Status : Register<0x4, 16>
{
struct BA : Bitfield<8,1> {};
struct RXOVF : Bitfield<7,1> {};
struct TXDV : Bitfield<6,1> {};
struct RXDV : Bitfield<5,1> {};
struct RXRW : Bitfield<3,1> {};
};
struct I2C_address : Register<0x8, 16>
{
struct ADD : Bitfield<0,10> {};
};
struct I2C_data : Register<0xC, 16>
{
struct DATA : Bitfield<0,8> {};
};
struct Interrupt_status : Register<0x10, 16>
{
struct ARB_LOST : Bitfield<9,1> {};
struct RX_UNF : Bitfield<7,1> {};
struct TX_OVF : Bitfield<6,1> {};
struct RX_OVF : Bitfield<5,1> {};
struct SLV_RDY : Bitfield<4,1> {};
struct TO : Bitfield<3,1> {};
struct NACK : Bitfield<2,1> {};
struct DATA : Bitfield<1,1> {};
struct COMP : Bitfield<0,1> {};
};
struct Transfer_size : Register<0x14, 8>
{
struct SIZE : Bitfield<0,8> {};
};
struct Slave_mon_pause : Register<0x18, 8>
{
struct PAUSE : Bitfield<0,4> {};
};
struct Time_out : Register<0x1C, 8>
{
struct TO : Bitfield<0,8> {};
};
struct Interrupt_mask : Register<0x20, 16>
{
struct ARB_LOST : Bitfield<9,1> {};
struct RX_UNF : Bitfield<7,1> {};
struct TX_OVF : Bitfield<6,1> {};
struct RX_OVF : Bitfield<5,1> {};
struct SLV_RDY : Bitfield<4,1> {};
struct TO : Bitfield<3,1> {};
struct NACK : Bitfield<2,1> {};
struct DATA : Bitfield<1,1> {};
struct COMP : Bitfield<0,1> {};
};
struct Interrupt_enable : Register<0x24, 16>
{
struct ARB_LOST : Bitfield<9,1> {};
struct RX_UNF : Bitfield<7,1> {};
struct TX_OVF : Bitfield<6,1> {};
struct RX_OVF : Bitfield<5,1> {};
struct SLV_RDY : Bitfield<4,1> {};
struct TO : Bitfield<3,1> {};
struct NACK : Bitfield<2,1> {};
struct DATA : Bitfield<1,1> {};
struct COMP : Bitfield<0,1> {};
};
struct Interrupt_disable : Register<0x28, 16>
{
struct ARB_LOST : Bitfield<9,1> {};
struct RX_UNF : Bitfield<7,1> {};
struct TX_OVF : Bitfield<6,1> {};
struct RX_OVF : Bitfield<5,1> {};
struct SLV_RDY : Bitfield<4,1> {};
struct TO : Bitfield<3,1> {};
struct NACK : Bitfield<2,1> {};
struct DATA : Bitfield<1,1> {};
struct COMP : Bitfield<0,1> {};
};
Timer::Connection _timer;
int sendByteCount;
uint8_t *sendBufferPtr;
void init(int direction)
{
write<Control>( Control::divisor_a::bits(2) |
Control::divisor_b::bits(16) |
Control::ACK_EN::bits(1) |
Control::CLR_FIFO::bits(1) |
Control::NEA::bits(1) |
Control::MS::bits(1));
write<Control::RW>(direction);
}
void transmitFifoFill()
{
uint8_t availBytes;
int loopCnt;
int numBytesToSend;
/*
* Determine number of bytes to write to FIFO.
*/
availBytes = I2C_FIFO_DEPTH - read<Transfer_size::SIZE>();
numBytesToSend = sendByteCount > availBytes ? availBytes : sendByteCount;
/*
* Fill FIFO with amount determined above.
*/
for (loopCnt = 0; loopCnt < numBytesToSend; loopCnt++)
{
write<I2C_data::DATA>(*sendBufferPtr);
sendBufferPtr++;
sendByteCount--;
}
}
int i2c_write(uint8_t slaveAddr, uint8_t *msgPtr, int byteCount)
{
uint32_t intrs, intrStatusReg;
sendByteCount = byteCount;
sendBufferPtr = msgPtr;
/*
* Set HOLD bit if byteCount is bigger than FIFO.
*/
if (byteCount > I2C_FIFO_DEPTH) write<Control::HOLD>(1);
/*
* Init sending master.
*/
init(SENDING);
/*
* intrs keeps all the error-related interrupts.
*/
intrs = INTERRUPT_ARB_LOST_MASK | INTERRUPT_TX_OVR_MASK | INTERRUPT_NACK_MASK;
/*
* Clear the interrupt status register before use it to monitor.
*/
write<Interrupt_status>(read<Interrupt_status>());
/*
* Transmit first FIFO full of data.
*/
transmitFifoFill();
write<I2C_address::ADD>(slaveAddr);
intrStatusReg = read<Interrupt_status>();
/*
* Continue sending as long as there is more data and there are no errors.
*/
while ((sendByteCount > 0) && ((intrStatusReg & intrs) == 0))
{
/*
* Wait until transmit FIFO is empty.
*/
if (read<Status::TXDV>() != 0)
{
intrStatusReg = read<Interrupt_status>();
continue;
}
/*
* Send more data out through transmit FIFO.
*/
transmitFifoFill();
}
/*
* Check for completion of transfer.
*/
while ((intrStatusReg & INTERRUPT_COMP_MASK) != INTERRUPT_COMP_MASK)
{
intrStatusReg = read<Interrupt_status>();
/*
* If there is an error, tell the caller.
*/
if ((intrStatusReg & intrs) != 0)
{
return 1;
}
}
write<Control::HOLD>(0);
return 0;
}
int i2c_read_byte(uint8_t slaveAddr, uint8_t *msgPtr)
{
uint32_t intrs, intrStatusReg;
/*
* Init receiving master.
*/
init(RECEIVING);
/*
* Clear the interrupt status register before use it to monitor.
*/
write<Interrupt_status>(read<Interrupt_status>());
/*
* Set up the transfer size register so the slave knows how much
* to send to us.
*/
write<Transfer_size::SIZE>(1);
/*
* Set slave address.
*/
write<I2C_address::ADD>(slaveAddr);
/*
* intrs keeps all the error-related interrupts.
*/
intrs = INTERRUPT_ARB_LOST_MASK | INTERRUPT_RX_OVR_MASK |
INTERRUPT_RX_UNF_MASK | INTERRUPT_NACK_MASK;
/*
* Poll the interrupt status register to find the errors.
*/
intrStatusReg = read<Interrupt_status>();
while (read<Status::RXDV>() != 1)
{
if (intrStatusReg & intrs) return 1;
}
if (intrStatusReg & intrs) return 1;
*msgPtr = read<I2C_data::DATA>();
while (read<Interrupt_status::COMP>() != 1) {}
return 0;
}
};
#endif // _I2C_H_

103
src/drivers/i2c/spec/zynq/main.cc
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@@ -1,103 +0,0 @@
/*
* \brief I2C Driver for Zynq
* \author Mark Albers
* \date 2015-03-12
*/
/*
* Copyright (C) 2015 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
#include <i2c_session/i2c_session.h>
#include <cap_session/connection.h>
#include <dataspace/client.h>
#include <base/log.h>
#include <base/heap.h>
#include <base/sleep.h>
#include <root/component.h>
#include <os/static_root.h>
#include <os/config.h>
#include "driver.h"
namespace I2C {
using namespace Genode;
class Session_component;
class Root;
};
class I2C::Session_component : public Genode::Rpc_object<I2C::Session>
{
private:
Driver &_driver;
unsigned int _bus;
Genode::Signal_context_capability _sigh;
public:
Session_component(Driver &driver, unsigned int bus_num) : _driver(driver), _bus(bus_num) {}
virtual bool read_byte_16bit_reg(Genode::uint8_t adr, Genode::uint16_t reg, Genode::uint8_t *data)
{
return _driver.read_byte_16bit_reg(_bus, adr, reg, data);
}
virtual bool write_16bit_reg(Genode::uint8_t adr, Genode::uint16_t reg,
Genode::uint8_t data)
{
return _driver.write_16bit_reg(_bus, adr, reg, data);
}
};
class I2C::Root : public Genode::Root_component<I2C::Session_component>
{
private:
Driver &_driver;
protected:
Session_component *_create_session(const char *args)
{
unsigned int bus = Genode::Arg_string::find_arg(args, "bus").ulong_value(0);
return new (md_alloc()) Session_component(_driver, bus);
}
public:
Root(Genode::Rpc_entrypoint *session_ep,
Genode::Allocator *md_alloc, Driver &driver)
: Genode::Root_component<I2C::Session_component>(session_ep, md_alloc),
_driver(driver) { }
};
int main(int, char **)
{
using namespace I2C;
Genode::log("Zynq I2C driver");
Driver &driver = Driver::factory();
/*
* Initialize server entry point
*/
enum { STACK_SIZE = 4096 };
static Cap_connection cap;
Sliced_heap sliced_heap(env()->ram_session(), env()->rm_session());
static Rpc_entrypoint ep(&cap, STACK_SIZE, "i2c_ep");
static I2C::Root i2c_root(&ep, &sliced_heap, driver);
/*
* Announce service
*/
env()->parent()->announce(ep.manage(&i2c_root));
Genode::sleep_forever();
return 0;
}

13
src/drivers/i2c/spec/zynq/target.mk
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@@ -1,13 +0,0 @@
# \brief I2C specific for zynq systems
# \author Mark Albers
# \date 2015-03-12
TARGET = zynq_i2c_drv
REQUIRES = zynq_i2c
SRC_CC = main.cc
LIBS = base config
INC_DIR += $(PRG_DIR)
vpath main.cc $(PRG_DIR)