riscv: ISA-1.9.1 and GCC-6.3.0 adaptions

Adds 1.9.1 support to base-hw

Note:
* the kernel timer is not working
* dynamic linking is currently not supported
This commit is contained in:
Sebastian Sumpf
2017-05-26 16:27:39 +02:00
committed by Christian Helmuth
parent 6c95eb9aff
commit c3cf7f3c3a
18 changed files with 278 additions and 555 deletions

View File

@@ -0,0 +1,25 @@
/*
* \brief MMIO and IRQ definitions for RISC-V (1.9.1)
* \author Sebastian Sumpf
* \date 2017-05-29
*/
/*
* Copyright (C) 2013-2017 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU Affero General Public License version 3.
*/
#ifndef _INCLUDE__DRIVERS__DEFS__RISCV_H_
#define _INCLUDE__DRIVERS__DEFS__RISCV_H_
namespace Riscv {
enum {
RAM_0_BASE = 0x81000000,
RAM_0_SIZE = 0x6e00000,
};
}
#endif /* _INCLUDE__DRIVERS__DEFS__RISCV_H_ */