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core: unify handling of boot modules

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Instead of solving the problem to deliver ROM modules to core while booting
differently for the several kernels (multi-boot, elfweaver, core re-linking),
this commit unifies the approaches. It always builds core as a library, and
after all binaries are built from a run-script, the run-tool will link an
ELF image out of the core-library and all boot modules. Thereby, core can
access its ROM modules directly.

This approach now works for all kernels except Linux.

With this solution, there is no [build_dir]/bin/core binary available anymore.
For debugging purposes you will find a core binary without boot modules, but
with debug symbols under [run_dir].core.

Fix #2095
This commit is contained in:
Stefan Kalkowski
2016-09-15 16:08:33 +02:00
committed by Christian Helmuth
parent 340a18007c
commit 7e1692d997
80 changed files with 450 additions and 1395 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
repos/base-pistachio/src/core/target.inc → repos/base-pistachio/lib/mk/core.inc
View File

@@ -1,4 +1,3 @@
TARGET = core
REQUIRES = pistachio
LIBS = base-common
@@ -20,7 +19,6 @@ SRC_CC = stack_area.cc \
irq_session_component.cc \
kip.cc \
main.cc \
multiboot_info.cc \
pd_session_component.cc \
rpc_cap_factory_l4.cc \
pd_assign_pci.cc \

4
repos/base-pistachio/src/core/spec/x86/target.mk → repos/base-pistachio/lib/mk/spec/x86/core.mk
View File

@@ -1,4 +1,4 @@
include $(REP_DIR)/src/core/target.inc
include $(REP_DIR)/lib/mk/core.inc
REQUIRES += x86
SRC_CC += io_port_session_component.cc \
@@ -8,4 +8,4 @@ SRC_CC += io_port_session_component.cc \
vpath io_port_session_component.cc $(GEN_CORE_DIR)/spec/x86
vpath io_port_session_support.cc $(GEN_CORE_DIR)/spec/x86
vpath platform_services.cc $(GEN_CORE_DIR)/spec/x86
vpath platform_x86.cc $(REP_DIR)/src/core/spec/x86

5
repos/base-pistachio/mk/spec/pistachio_x86.mk
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@@ -5,10 +5,5 @@
SPECS += x86_32 pistachio
SPECS += pci ps2 vesa framebuffer
#
# Linker options that are specific for x86
#
LD_TEXT_ADDR ?= 0x00300000
include $(call select_from_repositories,mk/spec/x86_32.mk)
include $(call select_from_repositories,mk/spec/pistachio.mk)

2
repos/base-pistachio/src/core/include/map_local.h
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@@ -14,6 +14,8 @@
#ifndef _CORE__INCLUDE__MAP_LOCAL_H_
#define _CORE__INCLUDE__MAP_LOCAL_H_
#include <base/printf.h>
/* core includes */
#include <platform.h>
#include <util.h>

3
repos/base-pistachio/src/core/include/platform.h
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@@ -21,7 +21,6 @@
#include "platform_generic.h"
#include "platform_thread.h"
#include "platform_pd.h"
#include "multiboot.h"
namespace Genode {
@@ -40,7 +39,6 @@ namespace Genode {
Phys_allocator _io_port_alloc; /* I/O port allocator */
Phys_allocator _irq_alloc; /* IRQ allocator */
Phys_allocator _region_alloc; /* virtual memory allocator for core */
Multiboot_info _mb_info; /* multiboot information */
Rom_fs _rom_fs; /* ROM file system */
Rom_module _kip_rom; /* ROM module for Fiasco KIP */
@@ -57,7 +55,6 @@ namespace Genode {
*
* - Map and provide KIP as ROM module
* - Initializes region allocator
* - Initializes multiboot info structure
*/
void _setup_basics();

112
repos/base-pistachio/src/core/multiboot_info.cc
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@@ -1,112 +0,0 @@
/*
* \brief GRUB multi-boot information handling
* \author Christian Helmuth
* \date 2006-05-10
*/
/*
* Copyright (C) 2006-2013 Genode Labs GmbH
*
* This file is part of the Genode OS framework, which is distributed
* under the terms of the GNU General Public License version 2.
*/
/* Genode includes */
#include <base/printf.h>
#include <multiboot.h>
#include <util/misc_math.h>
/* core includes */
#include <util.h>
#include <kip.h>
/* Pistachio includes */
namespace Pistachio {
#include <l4/bootinfo.h>
#include <l4/sigma0.h>
}
using namespace Genode;
static const bool verbose = false;
#define VPRINTF(fmt...) if (verbose) printf(fmt); else {}
unsigned Multiboot_info::num_modules()
{
using namespace Pistachio;
unsigned int i = 0;
L4_Word_t entries;
L4_BootRec_t *rec;
for (entries = L4_BootInfo_Entries(reinterpret_cast<void *>(Mmio::base)),
rec = L4_BootInfo_FirstEntry(reinterpret_cast<void *>(Mmio::base));
entries > 0;
entries--, rec = L4_Next(rec))
{
if (L4_Type(rec) == L4_BootInfo_Module)
i++;
}
/* return count of modules */
return i;
}
Rom_module Multiboot_info::get_module(unsigned num)
{
using namespace Pistachio;
/* find the right record */
bool found = false;
unsigned int i = 0;
L4_Word_t entries;
L4_BootRec_t *rec;
for (entries = L4_BootInfo_Entries(reinterpret_cast<void *>(Mmio::base)),
rec = L4_BootInfo_FirstEntry(reinterpret_cast<void *>(Mmio::base));
entries > 0;
entries--, rec = L4_Next(rec))
{
if ((L4_Type(rec) == L4_BootInfo_Module) &&
(i++ == num)) {
found = true;
break;
}
}
if (!found)
panic("No such rom module");
/* strip path info and command line */
char *name = L4_Module_Cmdline(rec);
for (char *c = name; *c != 0; c++) {
if (*c == '/') name = c + 1;
if (*c == ' ') {
*c = 0;
break;
}
}
/* request the memory from sigma0 and create the rom_module object */
L4_Word_t start = L4_Module_Start(rec);
L4_Word_t size = L4_Module_Size(rec);
if (start != trunc_page(start))
panic("Module is not aligned to page boundary.");
L4_ThreadId_t s0 = get_sigma0();
addr_t ps = get_page_size();
for (addr_t cur = start; cur < start + size; cur += ps) {
L4_Fpage_t fp = L4_Sigma0_GetPage(s0, L4_Fpage(cur, ps));
if (L4_IsNilFpage(fp) ||
L4_Address(fp) != cur)
panic("Unable to map module data.");
}
Rom_module ret = Rom_module(start, size, name);
return ret;
}

54
repos/base-pistachio/src/core/platform.cc
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@@ -25,6 +25,7 @@
#include <base/internal/globals.h>
/* core includes */
#include <boot_modules.h>
#include <core_parent.h>
#include <map_local.h>
#include <platform.h>
@@ -46,8 +47,8 @@ namespace Pistachio {
using namespace Genode;
static const bool verbose = false;
static const bool verbose_core_pf = false;
static const bool verbose = true;
static const bool verbose_core_pf = true;
static const bool verbose_region_alloc = false;
@@ -508,9 +509,6 @@ void Platform::_setup_basics()
_kip_rom = Rom_module((addr_t)kip, sizeof(L4_KernelInterfacePage_t), "pistachio_kip");
_rom_fs.insert(&_kip_rom);
/* update multi-boot info pointer from KIP */
void *mb_info_ptr = (void *)kip->BootInfo;
// Get virtual bootinfo address.
L4_Fpage_t bipage = L4_Sigma0_GetPage(get_sigma0(),
@@ -519,16 +517,8 @@ void Platform::_setup_basics()
if (L4_IsNilFpage(bipage))
panic("Could not map BootInfo.");
if (!L4_BootInfo_Valid(mb_info_ptr))
panic("No valid boot info.");
if (L4_BootInfo_Size(mb_info_ptr) > get_page_size())
panic("TODO Our multiboot info is bigger than a page...");
/* done magic */
if (verbose) log("MBI @ ", mb_info_ptr);
/* get UTCB memory */
Platform_pd::touch_utcb_space();
@@ -572,11 +562,9 @@ void Platform::_setup_basics()
_region_alloc.remove_range(stack_area_virtual_base(),
stack_area_virtual_size());
/* remove KIP and MBI area from region and IO_MEM allocator */
/* remove KIP area from region and IO_MEM allocator */
remove_region(Region((addr_t)kip, (addr_t)kip + kip_size), _region_alloc);
remove_region(Region((addr_t)kip, (addr_t)kip + kip_size), _io_mem_alloc);
remove_region(Region((addr_t)mb_info_ptr, (addr_t)mb_info_ptr + _mb_info.size()), _region_alloc);
remove_region(Region((addr_t)mb_info_ptr, (addr_t)mb_info_ptr + _mb_info.size()), _io_mem_alloc);
/* remove utcb area */
addr_t utcb_ptr = (addr_t)Platform_pd::_core_utcb_ptr;
@@ -597,31 +585,12 @@ void Platform::_setup_basics()
void Platform::_setup_rom()
{
Rom_module rom;
Pistachio::L4_Word_t page_size = Pistachio::get_page_size();
for (unsigned i = 0; i < _mb_info.num_modules(); i++) {
if (!(rom = _mb_info.get_module(i)).valid()) continue;
Rom_module *new_rom = new(core_mem_alloc()) Rom_module(rom);
_rom_fs.insert(new_rom);
if (verbose)
log(" mod[", i, "] ", *new_rom);
/* zero remainder of last ROM page */
size_t count = page_size - rom.size() % page_size;
if (count != page_size)
memset(reinterpret_cast<void *>(rom.addr() + rom.size()), 0, count);
/* remove ROM area from region and IO_MEM allocator */
remove_region(Region(new_rom->addr(), new_rom->addr() + new_rom->size()), _region_alloc);
remove_region(Region(new_rom->addr(), new_rom->addr() + new_rom->size()), _io_mem_alloc);
/* add area to core-accessible ranges */
add_region(Region(new_rom->addr(), new_rom->addr() + new_rom->size()), _core_address_ranges());
/* add boot modules to ROM FS */
Boot_modules_header * header = &_boot_modules_headers_begin;
for (; header < &_boot_modules_headers_end; header++) {
Rom_module * rom = new (core_mem_alloc())
Rom_module(header->base, header->size, (const char*)header->name);
_rom_fs.insert(rom);
}
}
@@ -637,8 +606,7 @@ Platform_pd *Platform::core_pd()
Platform::Platform() :
_ram_alloc(nullptr), _io_mem_alloc(core_mem_alloc()),
_io_port_alloc(core_mem_alloc()), _irq_alloc(core_mem_alloc()),
_region_alloc(core_mem_alloc()),
_mb_info(init_kip()->BootInfo)
_region_alloc(core_mem_alloc())
{
/*
* We must be single-threaded at this stage and so this is safe.

2
repos/base-pistachio/src/core/region_map_support.cc
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@@ -11,6 +11,8 @@
* under the terms of the GNU General Public License version 2.
*/
#include <base/printf.h>
/* core includes */
#include <rm_session_component.h>