core: unify handling of boot modules
Instead of solving the problem to deliver ROM modules to core while booting differently for the several kernels (multi-boot, elfweaver, core re-linking), this commit unifies the approaches. It always builds core as a library, and after all binaries are built from a run-script, the run-tool will link an ELF image out of the core-library and all boot modules. Thereby, core can access its ROM modules directly. This approach now works for all kernels except Linux. With this solution, there is no [build_dir]/bin/core binary available anymore. For debugging purposes you will find a core binary without boot modules, but with debug symbols under [run_dir].core. Fix #2095
This commit is contained in:
committed by
Christian Helmuth
parent
340a18007c
commit
7e1692d997
@@ -1,4 +1,3 @@
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TARGET = core
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REQUIRES += foc
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GEN_CORE_DIR = $(BASE_DIR)/src/core
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@@ -20,7 +19,6 @@ SRC_CC += stack_area.cc \
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ipc_pager.cc \
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irq_session_component.cc \
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main.cc \
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multiboot_info.cc \
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pager.cc \
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pager_object.cc \
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pd_session_component.cc \
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@@ -59,7 +57,6 @@ vpath default_log.cc $(GEN_CORE_DIR)
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vpath io_mem_session_component.cc $(GEN_CORE_DIR)
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vpath io_mem_session_support.cc $(GEN_CORE_DIR)
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vpath main.cc $(GEN_CORE_DIR)
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vpath multiboot_info.cc $(GEN_CORE_DIR)
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vpath pd_session_component.cc $(GEN_CORE_DIR)
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vpath pd_assign_pci.cc $(GEN_CORE_DIR)
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vpath pd_upgrade_ram_quota.cc $(GEN_CORE_DIR)
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@@ -5,6 +5,6 @@ SRC_CC += spec/arm/platform_arm.cc \
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# override default stack-area location
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INC_DIR += $(REP_DIR)/src/include/spec/arm
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include $(REP_DIR)/src/core/target.inc
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include $(REP_DIR)/lib/mk/core.inc
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vpath platform_services.cc $(GEN_CORE_DIR)
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@@ -1,4 +1,3 @@
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LD_TEXT_ADDR = 0x500000
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REQUIRES += x86
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SRC_CC += io_port_session_component.cc \
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io_port_session_support.cc \
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@@ -9,4 +8,4 @@ vpath io_port_session_component.cc $(BASE_DIR)/src/core/spec/x86
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vpath io_port_session_support.cc $(BASE_DIR)/src/core/spec/x86
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vpath platform_services.cc $(BASE_DIR)/src/core/spec/x86
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include $(REP_DIR)/src/core/target.inc
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include $(REP_DIR)/lib/mk/core.inc
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@@ -1,4 +1,4 @@
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REQUIRES += foc_x86_32
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SRC_CC += spec/x86_32/ipc_pager.cc
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include $(REP_DIR)/src/core/spec/x86/target.inc
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include $(REP_DIR)/lib/mk/spec/x86/core.inc
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@@ -1,4 +1,4 @@
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REQUIRES += foc_x86_64
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SRC_CC += spec/x86_64/ipc_pager.cc
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include $(REP_DIR)/src/core/spec/x86/target.inc
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include $(REP_DIR)/lib/mk/spec/x86/core.inc
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@@ -4,11 +4,6 @@
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SPECS += foc
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#
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# Linker options that are specific for arm
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#
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LD_TEXT_ADDR ?= 0x01000000
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#
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# ARM-specific L4/sys headers
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#
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@@ -5,11 +5,6 @@
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SPECS += x86_32 foc
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SPECS += pci ps2 vesa framebuffer
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#
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# Linker options that are specific for x86
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#
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LD_TEXT_ADDR ?= 0x01000000
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#
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# L4/sys headers
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#
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@@ -5,11 +5,6 @@
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SPECS += x86_64 foc
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SPECS += pci ps2 vesa framebuffer
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#
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# Linker options that are specific for x86
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#
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LD_TEXT_ADDR ?= 0x01000000
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#
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# L4/sys headers
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#
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@@ -26,7 +26,6 @@
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#include <platform_generic.h>
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#include <platform_thread.h>
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#include <platform_pd.h>
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#include <multiboot.h>
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namespace Genode {
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@@ -60,7 +59,6 @@ namespace Genode {
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Phys_allocator _irq_alloc; /* IRQ allocator */
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Phys_allocator _region_alloc; /* virtual memory allocator for core */
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Cap_id_allocator _cap_id_alloc; /* capability id allocator */
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Multiboot_info _mb_info; /* multiboot information */
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Rom_fs _rom_fs; /* ROM file system */
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Rom_module _kip_rom; /* ROM module for Fiasco KIP */
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Sigma0 _sigma0;
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@@ -79,7 +77,6 @@ namespace Genode {
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*
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* - Map and provide KIP as ROM module
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* - Initializes region allocator
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* - Initializes multiboot info structure
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*/
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void _setup_basics();
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@@ -24,12 +24,12 @@
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#include <base/internal/globals.h>
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/* core includes */
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#include <boot_modules.h>
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#include <core_parent.h>
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#include <platform.h>
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#include <platform_thread.h>
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#include <platform_pd.h>
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#include <util.h>
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#include <multiboot.h>
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/* Fiasco includes */
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namespace Fiasco {
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@@ -397,8 +397,6 @@ void Platform::_setup_basics()
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/* remove KIP and MBI area from region and IO_MEM allocator */
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remove_region(Region((addr_t)kip, (addr_t)kip + L4_PAGESIZE), _region_alloc);
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remove_region(Region((addr_t)kip, (addr_t)kip + L4_PAGESIZE), _io_mem_alloc);
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remove_region(Region(mb_info_addr, mb_info_addr + _mb_info.size()), _region_alloc);
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remove_region(Region(mb_info_addr, mb_info_addr + _mb_info.size()), _io_mem_alloc);
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/* remove core program image memory from region and IO_MEM allocator */
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addr_t img_start = (addr_t) &_prog_img_beg;
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@@ -413,28 +411,12 @@ void Platform::_setup_basics()
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void Platform::_setup_rom()
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{
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Rom_module rom;
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for (unsigned i = FIRST_ROM; i < _mb_info.num_modules(); i++) {
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if (!(rom = _mb_info.get_module(i)).valid()) continue;
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Rom_module *new_rom = new(core_mem_alloc()) Rom_module(rom);
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_rom_fs.insert(new_rom);
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/* map module */
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touch_ro((const void*)new_rom->addr(), new_rom->size());
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/* zero remainder of last ROM page */
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size_t count = L4_PAGESIZE - rom.size() % L4_PAGESIZE;
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if (count != L4_PAGESIZE)
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memset(reinterpret_cast<void *>(rom.addr() + rom.size()), 0, count);
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/* remove ROM area from region and IO_MEM allocator */
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remove_region(Region(new_rom->addr(), new_rom->addr() + new_rom->size()), _region_alloc);
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remove_region(Region(new_rom->addr(), new_rom->addr() + new_rom->size()), _io_mem_alloc);
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/* add area to core-accessible ranges */
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add_region(Region(new_rom->addr(), new_rom->addr() + new_rom->size()), _core_address_ranges());
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/* add boot modules to ROM FS */
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Boot_modules_header * header = &_boot_modules_headers_begin;
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for (; header < &_boot_modules_headers_end; header++) {
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Rom_module * rom = new (core_mem_alloc())
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Rom_module(header->base, header->size, (const char*)header->name);
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_rom_fs.insert(rom);
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}
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Rom_module *kip_rom = new(core_mem_alloc())
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@@ -447,7 +429,6 @@ Platform::Platform() :
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_ram_alloc(nullptr), _io_mem_alloc(core_mem_alloc()),
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_io_port_alloc(core_mem_alloc()), _irq_alloc(core_mem_alloc()),
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_region_alloc(core_mem_alloc()), _cap_id_alloc(core_mem_alloc()),
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_mb_info(sigma0_map_kip()->user_ptr, true),
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_sigma0(cap_map()->insert(_cap_id_alloc.alloc(), Fiasco::L4_BASE_PAGER_CAP))
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{
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/*
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@@ -14,6 +14,7 @@
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/* Genode includes */
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#include <base/capability.h>
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#include <base/printf.h>
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#include <util/misc_math.h>
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/* core includes */
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@@ -1,4 +0,0 @@
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LD_TEXT_ADDR = 0x80100000
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REQUIRES += foc_arndale
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include $(REP_DIR)/src/core/spec/arm/target.inc
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@@ -1,4 +0,0 @@
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LD_TEXT_ADDR = 0x70140000
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REQUIRES += foc_imx53
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include $(REP_DIR)/src/core/spec/arm/target.inc
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@@ -1,4 +0,0 @@
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LD_TEXT_ADDR = 0x80100000
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REQUIRES += foc_odroid_x2
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include $(REP_DIR)/src/core/spec/arm/target.inc
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@@ -1,4 +0,0 @@
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LD_TEXT_ADDR = 0x80140000
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REQUIRES += foc_panda
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include $(REP_DIR)/src/core/spec/arm/target.inc
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@@ -1,4 +0,0 @@
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LD_TEXT_ADDR = 0x70490000
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REQUIRES += foc_pbxa9
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include $(REP_DIR)/src/core/spec/arm/target.inc
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@@ -1,5 +0,0 @@
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REQUIRES += foc_rpi
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LD_TEXT_ADDR ?= 0x800000
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include $(REP_DIR)/src/core/spec/arm/target.inc
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