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base: introduce caching attributes (fix #1184)

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On ARM it's relevant to not only distinguish between ordinary cached memory
and write-combined one, but also having non-cached memory too. To insert the
appropriated page table entries e.g.: in the base-hw kernel, we need to preserve
the information about the kind of memory from allocation until the pager
resolves a page fault. Therefore, this commit introduces a new Cache_attribute
type, and replaces the write_combined boolean with the new type where necessary.
This commit is contained in:
Stefan Kalkowski
2014-06-19 16:37:31 +02:00
committed by Norman Feske
parent 9580954d81
commit 786fe805da
60 changed files with 216 additions and 160 deletions
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10
repos/base-pistachio/include/base/ipc_pager.h
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@@ -15,6 +15,7 @@
#define _INCLUDE__BASE__IPC_PAGER_H_
/* Genode includes */
#include <base/cache.h>
#include <base/native_types.h>
#include <base/ipc.h>
#include <base/stdint.h>
@@ -37,20 +38,13 @@ namespace Genode {
Pistachio::L4_GrantItem_t _grant_item;
};
/*
* On Pistachio, the write-combining attribute is not part of a mapping
* but it can be applied to a flexpage via the memory-control system
* call. Therefore, we need to keep the flag in an extra member variable.
*/
bool _write_combined; /* enable write-combined access to I/O memory */
public:
/**
* Constructor
*/
Mapping(addr_t dst_addr, addr_t src_addr,
bool write_combined, bool io_mem,
Cache_attribute, bool io_mem,
unsigned l2size = Pistachio::get_page_size_log2(),
bool rw = true, bool grant = false);

4
repos/base-pistachio/src/base/ipc/pager.cc
View File

@@ -32,10 +32,8 @@ using namespace Pistachio;
*************/
Mapping::Mapping(addr_t dst_addr, addr_t src_addr,
bool write_combined, bool io_mem, unsigned l2size,
Cache_attribute, bool io_mem, unsigned l2size,
bool rw, bool grant)
:
_write_combined(write_combined)
{
L4_Fpage_t fpage = L4_FpageLog2(src_addr, l2size);

2
repos/base-pistachio/src/core/io_mem_session_support.cc
View File

@@ -104,7 +104,7 @@ addr_t Io_mem_session_component::_map_local(addr_t base, size_t size)
L4_Fpage(base + offset, page_size),
L4_Fpage(local_base + offset, page_size));
if (_write_combined) {
if (_cacheable == WRITE_COMBINED) {
int res = L4_Set_PageAttribute(L4_Fpage(local_base + offset, page_size),
L4_WriteCombiningMemory);
if (res != 1)