hw: introduce kernel/user address space split

* introduces central memory map for core/kernel * on 32-bit platforms the kernel/core starts at 0x80000000 * on 64-bit platforms the kernel/core starts at 0xffffffc000000000 * mark kernel/core mappings as global ones (tagged TLB) * move the exception vector to begin of core's binary, thereby bootstrap knows from where to map it appropriately * do not map boot modules into core anymore * constrain core's virtual heap memory area * differentiate in between user's and core's main thread's UTCB, which now resides inside the kernel segment Ref #2091
2017-06-20 15:25:04 +02:00
parent 362337a9e8
commit 42db1e112b
41 changed files with 275 additions and 73 deletions
--- a/repos/base-hw/lib/mk/base-hw.mk
+++ b/repos/base-hw/lib/mk/base-hw.mk
@@ -6,5 +6,6 @@ SRC_CC += cache.cc
 SRC_CC += raw_write_string.cc
 SRC_CC += signal_receiver.cc
 SRC_CC += stack_area_addr.cc
+SRC_CC += native_utcb.cc

 LIBS += startup-hw base-hw-common cxx timeout-hw
--- a/repos/base-hw/lib/mk/core-hw.inc
+++ b/repos/base-hw/lib/mk/core-hw.inc
@@ -30,6 +30,7 @@ SRC_CC += io_mem_session_support.cc
 SRC_CC += irq_session_component.cc
 SRC_CC += main.cc
 SRC_CC += native_pd_component.cc
+SRC_CC += native_utcb.cc
 SRC_CC += pd_session_support.cc
 SRC_CC += platform.cc
 SRC_CC += platform_rom_modules.cc
--- a/repos/base-hw/lib/mk/spec/arm/core-hw.inc
+++ b/repos/base-hw/lib/mk/spec/arm/core-hw.inc
@@ -8,6 +8,7 @@
 INC_DIR += $(BASE_DIR)/../base-hw/src/core/spec/arm

 # add C++ sources
+SRC_CC += spec/32bit/memory_map.cc
 SRC_CC += spec/arm/kernel/thread.cc
 SRC_CC += spec/arm/kernel/cpu_idle.cc
 SRC_CC += spec/arm/kernel/pd.cc
@@ -16,5 +17,7 @@ SRC_CC += spec/arm/platform_support.cc
 # add assembly sources
 SRC_S += spec/arm/crt0.s

+vpath spec/32bit/memory_map.cc $(BASE_DIR)/../base-hw/src/lib/hw
+
 # include less specific configuration
 include $(BASE_DIR)/../base-hw/lib/mk/core-hw.inc
--- a/repos/base-hw/lib/mk/spec/arndale/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/arndale/bootstrap-hw.mk
@@ -4,6 +4,7 @@ SRC_CC  += bootstrap/spec/arm/cortex_a15_cpu.cc
 SRC_CC  += bootstrap/spec/arndale/pic.cc
 SRC_CC  += bootstrap/spec/arndale/platform.cc
 SRC_CC  += hw/spec/arm/arm_v7_cpu.cc
+SRC_CC  += hw/spec/32bit/memory_map.cc
 SRC_S   += bootstrap/spec/arm/crt0.s

 NR_OF_CPUS = 2
--- a/repos/base-hw/lib/mk/spec/imx53_qsb/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/imx53_qsb/bootstrap-hw.mk
@@ -6,6 +6,7 @@ SRC_CC  += bootstrap/spec/arm/cortex_a8_mmu.cc
 SRC_CC  += bootstrap/spec/arm/cpu.cc
 SRC_CC  += bootstrap/spec/arm/imx_tzic.cc
 SRC_CC  += hw/spec/arm/arm_v7_cpu.cc
+SRC_CC  += hw/spec/32bit/memory_map.cc

 ifneq ($(filter-out $(SPECS),trustzone),)
 SRC_CC  += bootstrap/spec/imx53_qsb/platform.cc
--- a/repos/base-hw/lib/mk/spec/odroid_xu/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/odroid_xu/bootstrap-hw.mk
@@ -4,6 +4,7 @@ SRC_CC  += bootstrap/spec/arm/cortex_a15_cpu.cc
 SRC_CC  += bootstrap/spec/arm/pic.cc
 SRC_CC  += bootstrap/spec/odroid_xu/platform.cc
 SRC_CC  += hw/spec/arm/arm_v7_cpu.cc
+SRC_CC  += hw/spec/32bit/memory_map.cc
 SRC_S   += bootstrap/spec/arm/crt0.s

 include $(REP_DIR)/lib/mk/bootstrap-hw.inc
--- a/repos/base-hw/lib/mk/spec/panda/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/panda/bootstrap-hw.mk
@@ -6,6 +6,7 @@ SRC_CC    += bootstrap/spec/arm/cortex_a9_mmu.cc
 SRC_CC    += bootstrap/spec/arm/pic.cc
 SRC_CC    += bootstrap/spec/panda/platform.cc
 SRC_CC    += hw/spec/arm/arm_v7_cpu.cc
+SRC_CC    += hw/spec/32bit/memory_map.cc
 SRC_S     += bootstrap/spec/arm/crt0.s

 include $(BASE_DIR)/../base-hw/lib/mk/bootstrap-hw.inc
--- a/repos/base-hw/lib/mk/spec/pbxa9/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/pbxa9/bootstrap-hw.mk
@@ -7,5 +7,6 @@ SRC_CC  += bootstrap/spec/arm/cortex_a9_mmu.cc
 SRC_CC  += bootstrap/spec/arm/pic.cc
 SRC_CC  += bootstrap/spec/pbxa9/platform.cc
 SRC_CC  += hw/spec/arm/arm_v7_cpu.cc
+SRC_CC  += hw/spec/32bit/memory_map.cc

 include $(BASE_DIR)/../base-hw/lib/mk/bootstrap-hw.inc
--- a/repos/base-hw/lib/mk/spec/riscv/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/riscv/bootstrap-hw.mk
@@ -2,6 +2,9 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/bootstrap/spec/riscv

 SRC_CC  += bootstrap/spec/riscv/platform.cc
 SRC_CC  += lib/base/riscv/kernel/interface.cc
+SRC_CC  += spec/64bit/memory_map.cc
 SRC_S   += bootstrap/spec/riscv/crt0.s

+vpath spec/64bit/memory_map.cc $(BASE_DIR)/../base-hw/src/lib/hw
+
 include $(BASE_DIR)/../base-hw/lib/mk/bootstrap-hw.inc
--- a/repos/base-hw/lib/mk/spec/riscv/core-hw.mk
+++ b/repos/base-hw/lib/mk/spec/riscv/core-hw.mk
@@ -11,10 +11,13 @@ SRC_CC += spec/riscv/kernel/pd.cc
 SRC_CC += spec/riscv/kernel/cpu.cc
 SRC_CC += spec/riscv/platform_support.cc
 SRC_CC += spec/riscv/timer.cc
+SRC_CC += spec/64bit/memory_map.cc

 #add assembly sources
 SRC_S += spec/riscv/exception_vector.s
 SRC_S += spec/riscv/crt0.s

+vpath spec/64bit/memory_map.cc $(BASE_DIR)/../base-hw/src/lib/hw
+
 # include less specific configuration
 include $(REP_DIR)/lib/mk/core-hw.inc
--- a/repos/base-hw/lib/mk/spec/rpi/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/rpi/bootstrap-hw.mk
@@ -2,6 +2,7 @@ INC_DIR += $(BASE_DIR)/../base-hw/src/bootstrap/spec/rpi

 SRC_CC  += bootstrap/spec/rpi/platform.cc
 SRC_CC  += hw/spec/arm/arm_v6_cpu.cc
+SRC_CC  += hw/spec/32bit/memory_map.cc
 SRC_S   += bootstrap/spec/arm/crt0.s

 include $(BASE_DIR)/../base-hw/lib/mk/bootstrap-hw.inc
--- a/repos/base-hw/lib/mk/spec/usb_armory/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/usb_armory/bootstrap-hw.mk
@@ -7,5 +7,6 @@ SRC_CC  += bootstrap/spec/arm/cpu.cc
 SRC_CC  += bootstrap/spec/arm/imx_tzic.cc
 SRC_CC  += bootstrap/spec/usb_armory/platform.cc
 SRC_CC  += hw/spec/arm/arm_v7_cpu.cc
+SRC_CC  += hw/spec/32bit/memory_map.cc

 include $(BASE_DIR)/../base-hw/lib/mk/bootstrap-hw.inc
--- a/repos/base-hw/lib/mk/spec/wand_quad/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/wand_quad/bootstrap-hw.mk
@@ -7,6 +7,7 @@ SRC_CC  += bootstrap/spec/arm/cortex_a9_mmu.cc
 SRC_CC  += bootstrap/spec/arm/pic.cc
 SRC_CC  += bootstrap/spec/wand_quad/platform.cc
 SRC_CC  += hw/spec/arm/arm_v7_cpu.cc
+SRC_CC  += hw/spec/32bit/memory_map.cc

 NR_OF_CPUS = 4

--- a/repos/base-hw/lib/mk/spec/x86_pc/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/x86_pc/bootstrap-hw.mk
@@ -4,4 +4,6 @@ SRC_S   += bootstrap/spec/x86_64/crt0.s
 SRC_CC  += bootstrap/spec/x86_64/platform.cc
 SRC_S   += bootstrap/spec/x86_64/crt0_translation_table.s

+SRC_CC  += hw/spec/64bit/memory_map.cc
+
 include $(BASE_DIR)/../base-hw/lib/mk/bootstrap-hw.inc
--- a/repos/base-hw/lib/mk/spec/x86_pc/core-hw.mk
+++ b/repos/base-hw/lib/mk/spec/x86_pc/core-hw.mk
@@ -34,5 +34,9 @@ SRC_CC += spec/x86_64/kernel/thread.cc
 SRC_CC += spec/x86_64/kernel/thread.cc
 SRC_CC += spec/x86_64/platform_support_common.cc

+SRC_CC += spec/64bit/memory_map.cc
+
+vpath spec/64bit/memory_map.cc $(BASE_DIR)/../base-hw/src/lib/hw
+
 # include less specific configuration
 include $(BASE_DIR)/../base-hw/lib/mk/core-hw.inc
--- a/repos/base-hw/lib/mk/spec/zynq_qemu/bootstrap-hw.mk
+++ b/repos/base-hw/lib/mk/spec/zynq_qemu/bootstrap-hw.mk
@@ -7,5 +7,6 @@ SRC_CC  += bootstrap/spec/arm/cortex_a9_mmu.cc
 SRC_CC  += bootstrap/spec/arm/pic.cc
 SRC_CC  += bootstrap/spec/zynq/platform.cc
 SRC_CC  += hw/spec/arm/arm_v7_cpu.cc
+SRC_CC  += hw/spec/32bit/memory_map.cc

 include $(BASE_DIR)/../base-hw/lib/mk/bootstrap-hw.inc