diff --git a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc
index de148528a..ce339dc99 100644
--- a/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc
+++ b/repos/base-hw/src/bootstrap/spec/arm/cortex_a9_mmu.cc
@@ -109,13 +109,18 @@ unsigned Bootstrap::Platform::enable_mmu()
 	static Cpu_counter   data_cache_invalidated;
 	static Cpu_counter   data_cache_enabled;
 	static Cpu_counter   smp_coherency_enabled;
+	static unsigned long diag_reg = 0;
 
 	bool primary = primary_cpu;
-	if (primary) primary_cpu = false;
+	if (primary) {
+		primary_cpu = false;
+		diag_reg = Cpu::Diag::read();
+	}
 
 	Cpu::Sctlr::init();
 	Cpu::Cpsr::init();
 	Actlr::disable_smp();
+	Cpu::Diag::write(diag_reg);
 
 	/* locally initialize interrupt controller */
 	::Board::Pic pic { };
diff --git a/repos/base-hw/src/include/hw/spec/arm/cpu.h b/repos/base-hw/src/include/hw/spec/arm/cpu.h
index 81f6619a5..3773cf309 100644
--- a/repos/base-hw/src/include/hw/spec/arm/cpu.h
+++ b/repos/base-hw/src/include/hw/spec/arm/cpu.h
@@ -249,6 +249,9 @@ struct Hw::Arm_cpu
 	/* Physical Count register */
 	ARM_CP15_REGISTER_64BIT(Cntpct, c14, 0);
 
+	/* Diagnostic register */
+	ARM_CP15_REGISTER_32BIT(Diag, c15, c0, 0, 1);
+
 	/******************************
 	 ** Program status registers **
 	 ******************************/