zynq: add i2c driver
This commit is contained in:
Johannes Schlatow
committed by
Norman Feske
Norman Feske
parent
c5ebe885d0
commit
6989903446
317
include/spec/zynq/drivers/i2c.h
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317
include/spec/zynq/drivers/i2c.h
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/*
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* \brief Zynq I2C driver to be used with IO framework
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* \author Johannes Schlatow
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* \author Mark Albers
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* \date 2015-03-12
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*/
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/*
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* Copyright (C) 2015-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _INCLUDE__DRIVERS__I2C_H_
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#define _INCLUDE__DRIVERS__I2C_H_
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/* Genode includes */
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#include <util/i2c.h>
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#include <util/mmio.h>
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#include <base/attached_io_mem_dataspace.h>
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namespace Genode {
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class I2c_driver;
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}
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/**
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* I2C driver for Zynq
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*/
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class Genode::I2c_driver : Genode::I2c_driver_base, Attached_io_mem_dataspace, Mmio
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{
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private:
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enum {
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/* Maximal transfer size */
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I2C_MAX_TRANSFER_SIZE = 252,
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/* FIFO size */
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I2C_FIFO_DEPTH = 16,
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/* Number of bytes at data intr */
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I2C_DATA_INTR_DEPTH = 14,
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};
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int sendByteCount;
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uint8_t *sendBufferPtr;
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/*
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* Registers
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*/
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struct Control : Register<0x0, 16>
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{
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struct divisor_a : Bitfield<14,2> {};
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struct divisor_b : Bitfield<8,6> {};
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struct CLR_FIFO : Bitfield<6,1> {};
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struct SLVMON : Bitfield<5,1> {};
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struct HOLD : Bitfield<4,1> {};
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struct ACK_EN : Bitfield<3,1> {};
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struct NEA : Bitfield<2,1> {};
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struct MS : Bitfield<1,1> {};
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struct RW : Bitfield<0,1> {
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enum {
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SENDING = 0,
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RECEIVING = 1,
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};
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};
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};
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struct Status : Register<0x4, 16>
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{
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struct BA : Bitfield<8,1> {};
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struct RXOVF : Bitfield<7,1> {};
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struct TXDV : Bitfield<6,1> {};
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struct RXDV : Bitfield<5,1> {};
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struct RXRW : Bitfield<3,1> {};
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};
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struct I2C_address : Register<0x8, 16>
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{
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struct ADD : Bitfield<0,10> {};
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};
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struct I2C_data : Register<0xC, 16>
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{
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struct DATA : Bitfield<0,8> {};
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};
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template <unsigned OFFSET, unsigned SIZE>
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struct Interrupt_register : Register<OFFSET, SIZE>
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{
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template <unsigned POS, unsigned BIT>
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using Bitfield = typename Register<OFFSET, SIZE>::template Bitfield<POS, BIT>;
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struct ARB_LOST : Bitfield<9,1> {};
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struct RX_UNF : Bitfield<7,1> {};
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struct TX_OVF : Bitfield<6,1> {};
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struct RX_OVF : Bitfield<5,1> {};
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struct SLV_RDY : Bitfield<4,1> {};
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struct TO : Bitfield<3,1> {};
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struct NACK : Bitfield<2,1> {};
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struct DATA : Bitfield<1,1> {};
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struct COMP : Bitfield<0,1> {};
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};
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struct Interrupt_status : Interrupt_register<0x10, 16> { };
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struct Transfer_size : Register<0x14, 8>
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{
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struct SIZE : Bitfield<0,8> {};
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};
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struct Slave_mon_pause : Register<0x18, 8>
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{
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struct PAUSE : Bitfield<0,4> {};
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};
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struct Time_out : Register<0x1C, 8>
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{
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struct TO : Bitfield<0,8> {};
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};
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struct Interrupt_mask : Interrupt_register<0x20, 16> { };
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struct Interrupt_enable : Interrupt_register<0x24, 16> { };
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struct Interrupt_disable : Interrupt_register<0x28, 16> { };
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/*
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* Helper functions
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*/
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void _init()
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{
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write<Control>(Control::divisor_a::bits(2) |
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Control::divisor_b::bits(16) |
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Control::ACK_EN::bits(1) |
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Control::CLR_FIFO::bits(1) |
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Control::NEA::bits(1) |
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Control::MS::bits(1));
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}
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void _set_direction(int direction)
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{
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write<Control::CLR_FIFO>(1);
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write<Control::RW>(direction);
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}
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void _transmitFifoFill()
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{
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uint8_t availBytes;
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int loopCnt;
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int numBytesToSend;
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/*
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* Determine number of bytes to write to FIFO.
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*/
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availBytes = I2C_FIFO_DEPTH - read<Transfer_size::SIZE>();
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numBytesToSend = sendByteCount > availBytes ? availBytes : sendByteCount;
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/*
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* Fill FIFO with amount determined above.
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*/
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for (loopCnt = 0; loopCnt < numBytesToSend; loopCnt++)
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{
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write<I2C_data::DATA>(*sendBufferPtr);
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sendBufferPtr++;
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sendByteCount--;
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}
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}
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public:
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I2c_driver(Genode::Env &env, Genode::addr_t const mmio_base, Genode::size_t const mmio_size) :
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Genode::Attached_io_mem_dataspace(env, mmio_base, mmio_size),
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Genode::Mmio((Genode::addr_t)local_addr<void>())
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{
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_init();
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}
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int write_bytes(uint8_t slaveAddr, uint8_t *msgPtr, int byteCount, bool hold=false);
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int read_bytes(uint8_t slaveAddr, uint8_t *msgPtr, int byteCount);
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};
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int Genode::I2c_driver::write_bytes(uint8_t slaveAddr, uint8_t *msgPtr, int byteCount, bool hold)
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{
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uint32_t intrs, intrStatusReg;
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sendByteCount = byteCount;
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sendBufferPtr = msgPtr;
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/*
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* Set HOLD bit if byteCount is bigger than FIFO or HOLD is forced
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*/
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if (byteCount > I2C_FIFO_DEPTH || hold) write<Control::HOLD>(1);
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/*
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* Init sending master.
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*/
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_set_direction(Control::RW::SENDING);
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/*
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* intrs keeps all the error-related interrupts.
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*/
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intrs = Interrupt_status::ARB_LOST::reg_mask() |
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Interrupt_status::TX_OVF::reg_mask() |
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Interrupt_status::NACK::reg_mask();
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/*
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* Clear the interrupt status register before use it to monitor.
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*/
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write<Interrupt_status>(read<Interrupt_status>());
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/*
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* Transmit first FIFO full of data.
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*/
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_transmitFifoFill();
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write<I2C_address::ADD>(slaveAddr);
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intrStatusReg = read<Interrupt_status>();
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/*
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* Continue sending as long as there is more data and there are no errors.
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*/
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while ((sendByteCount > 0) && ((intrStatusReg & intrs) == 0))
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{
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/*
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* Wait until transmit FIFO is empty.
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*/
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if (read<Status::TXDV>() != 0)
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{
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intrStatusReg = read<Interrupt_status>();
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continue;
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}
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/*
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* Send more data out through transmit FIFO.
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*/
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_transmitFifoFill();
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}
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/*
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* Check for completion of transfer.
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*/
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while ((intrStatusReg & Interrupt_status::COMP::reg_mask()) == 0)
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{
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intrStatusReg = read<Interrupt_status>();
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/*
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* If there is an error, tell the caller.
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*/
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if ((intrStatusReg & intrs) != 0)
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{
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return 1;
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}
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}
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if (!hold)
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write<Control::HOLD>(0);
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return 0;
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}
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int Genode::I2c_driver::read_bytes(uint8_t slaveAddr, uint8_t *msgPtr, int byteCount)
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{
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uint32_t intrs, intrStatusReg;
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/*
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* Init receiving master.
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*/
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_set_direction(Control::RW::RECEIVING);
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/*
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* Clear the interrupt status register before use it to monitor.
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*/
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write<Interrupt_status>(read<Interrupt_status>());
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/*
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* Set up the transfer size register so the slave knows how much
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* to send to us.
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*/
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/* FIXME implement byteCount > 1 */
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if (byteCount > 1)
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Genode::error("I2C driver: byteCount > 1 not implemented");
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write<Transfer_size::SIZE>(1);
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/*
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* Set slave address.
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*/
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write<I2C_address::ADD>(slaveAddr);
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/*
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* intrs keeps all the error-related interrupts.
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*/
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intrs = Interrupt_status::ARB_LOST::reg_mask() |
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Interrupt_status::RX_OVF::reg_mask() |
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Interrupt_status::RX_UNF::reg_mask() |
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Interrupt_status::NACK::reg_mask();
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/*
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* Poll the interrupt status register to find the errors.
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*/
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intrStatusReg = read<Interrupt_status>();
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while (read<Status::RXDV>() != 1)
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{
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if (intrStatusReg & intrs) return 1;
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}
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if (intrStatusReg & intrs) return 1;
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*msgPtr = read<I2C_data::DATA>();
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while (read<Interrupt_status::COMP>() != 1) {}
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return 0;
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}
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#endif /* _INCLUDE__DRIVERS__I2C_H_ */
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