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zynq_boards: enable L2 cache

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This commit is contained in:
Johannes Schlatow
2019-05-06 17:02:15 +02:00
committed by Norman Feske
parent f84567e460
commit 6402247003
4 changed files with 128 additions and 4 deletions
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33
src/bootstrap/spec/zynq_parallella/board.h
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@@ -25,8 +25,9 @@
#include <spec/arm/pic.h> #include <spec/arm/pic.h>
namespace Board { namespace Board {
struct L2_cache;
using namespace Zynq_parallella; using namespace Zynq_parallella;
using L2_cache = Hw::Pl310;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>; using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using Serial = Genode::Xilinx_uart; using Serial = Genode::Xilinx_uart;
@@ -35,4 +36,34 @@ namespace Board {
}; };
} }
struct Board::L2_cache : Hw::Pl310
{
L2_cache(Genode::addr_t mmio) : Hw::Pl310(mmio)
{
Aux::access_t aux = 0;
Aux::Full_line_of_zero::set(aux, true);
Aux::Associativity::set(aux, Aux::Associativity::WAY_8);
Aux::Way_size::set(aux, Aux::Way_size::KB_64);
Aux::Share_override::set(aux, true);
Aux::Replacement_policy::set(aux, Aux::Replacement_policy::PRAND);
Aux::Ns_lockdown::set(aux, true);
Aux::Data_prefetch::set(aux, true);
Aux::Inst_prefetch::set(aux, true);
Aux::Early_bresp::set(aux, true);
write<Aux>(aux);
}
using Hw::Pl310::invalidate;
void enable()
{
Pl310::mask_interrupts();
write<Control::Enable>(1);
}
void disable() {
write<Control::Enable>(0);
}
};
#endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ_PARALLELLA__BOARD_H_ */ #endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ_PARALLELLA__BOARD_H_ */

33
src/bootstrap/spec/zynq_zc702/board.h
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@@ -25,8 +25,9 @@
#include <spec/arm/pic.h> #include <spec/arm/pic.h>
namespace Board { namespace Board {
struct L2_cache;
using namespace Zynq_zc702; using namespace Zynq_zc702;
using L2_cache = Hw::Pl310;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>; using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using Serial = Genode::Xilinx_uart; using Serial = Genode::Xilinx_uart;
@@ -35,4 +36,34 @@ namespace Board {
}; };
} }
struct Board::L2_cache : Hw::Pl310
{
L2_cache(Genode::addr_t mmio) : Hw::Pl310(mmio)
{
Aux::access_t aux = 0;
Aux::Full_line_of_zero::set(aux, true);
Aux::Associativity::set(aux, Aux::Associativity::WAY_8);
Aux::Way_size::set(aux, Aux::Way_size::KB_64);
Aux::Share_override::set(aux, true);
Aux::Replacement_policy::set(aux, Aux::Replacement_policy::PRAND);
Aux::Ns_lockdown::set(aux, true);
Aux::Data_prefetch::set(aux, true);
Aux::Inst_prefetch::set(aux, true);
Aux::Early_bresp::set(aux, true);
write<Aux>(aux);
}
using Hw::Pl310::invalidate;
void enable()
{
Pl310::mask_interrupts();
write<Control::Enable>(1);
}
void disable() {
write<Control::Enable>(0);
}
};
#endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ_ZC702__BOARD_H_ */ #endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ_ZC702__BOARD_H_ */

33
src/bootstrap/spec/zynq_zc706/board.h
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@@ -25,8 +25,9 @@
#include <spec/arm/pic.h> #include <spec/arm/pic.h>
namespace Board { namespace Board {
struct L2_cache;
using namespace Zynq_zc706; using namespace Zynq_zc706;
using L2_cache = Hw::Pl310;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>; using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using Serial = Genode::Xilinx_uart; using Serial = Genode::Xilinx_uart;
@@ -35,4 +36,34 @@ namespace Board {
}; };
} }
struct Board::L2_cache : Hw::Pl310
{
L2_cache(Genode::addr_t mmio) : Hw::Pl310(mmio)
{
Aux::access_t aux = 0;
Aux::Full_line_of_zero::set(aux, true);
Aux::Associativity::set(aux, Aux::Associativity::WAY_8);
Aux::Way_size::set(aux, Aux::Way_size::KB_64);
Aux::Share_override::set(aux, true);
Aux::Replacement_policy::set(aux, Aux::Replacement_policy::PRAND);
Aux::Ns_lockdown::set(aux, true);
Aux::Data_prefetch::set(aux, true);
Aux::Inst_prefetch::set(aux, true);
Aux::Early_bresp::set(aux, true);
write<Aux>(aux);
}
using Hw::Pl310::invalidate;
void enable()
{
Pl310::mask_interrupts();
write<Control::Enable>(1);
}
void disable() {
write<Control::Enable>(0);
}
};
#endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ_ZC706__BOARD_H_ */ #endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ_ZC706__BOARD_H_ */

33
src/bootstrap/spec/zynq_zedboard/board.h
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@@ -25,8 +25,9 @@
#include <spec/arm/pic.h> #include <spec/arm/pic.h>
namespace Board { namespace Board {
struct L2_cache;
using namespace Zynq_zedboard; using namespace Zynq_zedboard;
using L2_cache = Hw::Pl310;
using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>; using Cpu_mmio = Hw::Cortex_a9_mmio<CORTEX_A9_PRIVATE_MEM_BASE>;
using Serial = Genode::Xilinx_uart; using Serial = Genode::Xilinx_uart;
@@ -35,4 +36,34 @@ namespace Board {
}; };
} }
struct Board::L2_cache : Hw::Pl310
{
L2_cache(Genode::addr_t mmio) : Hw::Pl310(mmio)
{
Aux::access_t aux = 0;
Aux::Full_line_of_zero::set(aux, true);
Aux::Associativity::set(aux, Aux::Associativity::WAY_8);
Aux::Way_size::set(aux, Aux::Way_size::KB_64);
Aux::Share_override::set(aux, true);
Aux::Replacement_policy::set(aux, Aux::Replacement_policy::PRAND);
Aux::Ns_lockdown::set(aux, true);
Aux::Data_prefetch::set(aux, true);
Aux::Inst_prefetch::set(aux, true);
Aux::Early_bresp::set(aux, true);
write<Aux>(aux);
}
using Hw::Pl310::invalidate;
void enable()
{
Pl310::mask_interrupts();
write<Control::Enable>(1);
}
void disable() {
write<Control::Enable>(0);
}
};
#endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ_ZEDBOARD__BOARD_H_ */ #endif /* _SRC__BOOTSTRAP__SPEC__ZYNQ_ZEDBOARD__BOARD_H_ */