From e8d92225e4e3e13c185398acb9cf1ded362efaf2 Mon Sep 17 00:00:00 2001 From: Sebastian Sumpf Date: Tue, 7 Nov 2017 17:59:58 +0100 Subject: [PATCH] FOC: Fix in kernel 'Op_cache_dma_coherent' 'Mem_unit::flush_dcache' takes void pointers as arguments, no need to take the given void pointers ('start' and 'end') and transform them to 'Virt_addr(Address(x)' types. This breaks cache flushing in r72. --- kernel/fiasco/src/kern/arm/mem_op.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/fiasco/src/kern/arm/mem_op.cpp b/kernel/fiasco/src/kern/arm/mem_op.cpp index 8a15e5c1..fb15a8a8 100644 --- a/kernel/fiasco/src/kern/arm/mem_op.cpp +++ b/kernel/fiasco/src/kern/arm/mem_op.cpp @@ -99,7 +99,7 @@ Mem_op::__arm_kmem_l1_cache_maint(int op, void const *kstart, void const *kend) break; case Op_cache_dma_coherent: - Mem_unit::flush_dcache(Virt_addr(Address(kstart)), Virt_addr(Address(kend))); + Mem_unit::flush_dcache(kstart, kend); break; // We might not want to implement this one but single address outer