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Always enable user mode access for performance monitors

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QEMU implements the cycle count register read by
'Genode::Trace::timestamp()', but does not report a supported debug model
version for Cortex-A9.
This commit is contained in:
Christian Prochaska
2019-02-12 19:54:06 +01:00
parent 392d3a1a54
commit b74e427801
1 changed files with 7 additions and 2 deletions
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9
kernel/fiasco/src/kern/arm/perf_cnt-arm.cpp
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@@ -190,8 +190,13 @@ PUBLIC static FIASCO_INIT_CPU
void void
Perf_cnt::init_cpu() Perf_cnt::init_cpu()
{ {
if (!is_avail()) /*
return; * QEMU implements the cycle count register read by
* 'Genode::Trace::timestamp()', but does not report a supported debug model
* version for Cortex-A9.
*/
//if (!is_avail())
//return;
_nr_counters = (pmcr() >> 11) & 0x1f; _nr_counters = (pmcr() >> 11) & 0x1f;